Memory map of the NGIMS board: 00000-0ffffh (r) PROM 64KWords 00000-0ffffh (r) RAM 64KWords I/O map: bit 0: lsb, bit 15: msb 08410 (r) configuration register 15: MMU Select 0 (1) 14: No BPU in system (0) 13: Console mode disabled (0) 12: MMU Select 1 (1) 11: Interrupt Sensitivity (0 = edge) 10: MMU Select 2 (1) 9: Parity sense; (0 = even) 8: BIT; (1=BIT on power up) 7: SUREN (1 = enabled) 6: DMA (0 = none) 5: unused (pulled high) 4: unused (pulled high) 3: unused (pulled low) 2: control C bit (toggles) 1: TGO\_STAT; 0 = TGO didn't occur; 1 = TGO occured 0: SUREN_stat; 0 = in PROM mode; 1 = in RAM mode Reset status ports 6040h (r/w) any read or write clears TGO status bit Microsequencer ports 6080h (w) 2 bytes Write Cmd Word to useq cmd FIFOs e080h (r) 2 bytes Read data from useq data FIFO 6081h (w) Reset useq cmd FIFOs e081h (r) word read useq status 6082h (w) Enable uSeq 6083h (w) Start uSeq Clock uSeq requires a 4MHz 50% duty cycle clock. MicroSequencer Status bits e0a0h (r) 1 word read status word from Microsequencer Spares: 06060h Digital Control Signals: 060c0h (w) 16 bits 060e0h (w) 16 bits UART port* 6100h (w) byte data output port 6101h (w) byte control port e100h (r) byte data input port e101h (r) byte status port 7-segment displays and LED ports* 06120h (w) word 7 segment test LEDs 06121h (w) word 7 segment test LEDs 06140h (w) word 7 segment test LEDs 06141h (w) word 7 segment test LEDs 06160h (w) word 7 segment test LEDs 06161h (w) word 7 segment test LEDs 06180h (w) word 7 segment test LEDs 06181h (w) word 7 segment test LEDs 061a0h (w) word 7 segment test LEDs 061a1h (w) word 7 segment test LEDs 061c0h (w) word 7 segment test LEDs 061c1h (w) word Individual test LEDs 061e0h (w) word Individual test LEDs 061e1h (w) word Individual test LEDs 1553 Memory 16000-17fffh (w) 1553 MEM 8Kwords 26000-27fffh (w) 1553 MEM 8KWords 1e000-1ffffh (r) 1553 MEM 8KWords 2e000-2ffffh (r) 1553 MEM 8KWords 1553 interface (registers): 06000-0601f (w) 1553 REG 32 words 0e000-0e01f (r) 1553 REG 32 words Page registers: 06030h - 0603fh 06030h (w) Write "0" to data bit 2 to access low 64KW bank of EEPROM 06030h (w) Write "1" to data bit 2 to access high 64KW bank of EEPROM 06032h (w) Write "0" to data bit 0 to access low 32KW bank of XRAM 06032h (w) Write "1" to data bit 0 to access high 32KW bank of XRAM 0e030h (r) Reads RDY status of each EEPROM chip (high byte and low byte) 0e031h Data bit 2: (0 = low bank; 1 = High bank) of EEPROM selected Data bit 8: low byte status; 1 not ready, 0 = ready Data bit 9: High Byte status; 1 not ready, 0 = ready EEPROM IO 46000-47fffh (w) EEPROM MEM 8Kwords 56000-57fffh (w) EEPROM MEM 8Kwords 66000-67fffh (w) EEPROM MEM 8KWords 76000-77fffh (w) EEPROM MEM 8KWords 86000-87fffh (w) EEPROM MEM 8Kwords 96000-97fffh (w) EEPROM MEM 8Kwords a6000-a7fffh (w) EEPROM MEM 8KWords b6000-b7fffh (w) EEPROM MEM 8KWords 4e000-4ffffh (r) EEPROM MEM 8KWords 5e000-5ffffh (r) EEPROM MEM 8KWords 6e000-6ffffh (r) EEPROM MEM 8KWords 7e000-7ffffh (r) EEPROM MEM 8KWords 8e000-8ffffh (r) EEPROM MEM 8KWords 9e000-9ffffh (r) EEPROM MEM 8KWords ae000-affffh (r) EEPROM MEM 8KWords be000-bffffh (r) EEPROM MEM 8KWords Extra RAM NB: bit 0 = lsb c6000-c7fffh (w) IORAM 8KWords d6000-d7fffh (w) IORAM 8KWords e6000-efffh (w) IORAM 8KWords f6000-b6fffh (w) IORAM 8Kwords ce000-cffffh (r) IORAM 8KWords de000-dffffh (r) IORAM 8KWords ee000-effffh (r) IORAM 8KWords fe000-fffffh (r) IORAM 8KWords Interrupts INT02N dtstarti 1553cmdi\ interrupt (24,25) INT08N uSeqI uSeq Interrupt (30,31) INT10N spare spare (34,35) INT11N rti 1553int\ interrupt (36,37) INT13N spare (3A,3B) * Will not be part of the Flight Boards. Used for Debug Purposes only. Revised 10/26/99 Florence Tan 1/14/00 Florence Tan - corrected LED assignment (individual vs 7-segment),Clarified page register notes on EEPROM and XRAM